10:40 AM

Memory organization

The device has separate address spaces for program and data memory.
Data RAM memory
The data RAM has 1024 bytes of internal memory. The device can also address up to 64 kB for external data memory.


Expanded data RAM addressing
The P89V51RD2 has 1 kB of RAM. See Figure 5 “Internal and external data memory structure.”

The device has four sections of internal data memory:
1. The lower 128 bytes of RAM (00H to 7FH) are directly and indirectly addressable.
2. The higher 128 bytes of RAM (80H to FFH) are indirectly addressable.
3. The special function registers (80H to FFH) are directly addressable only.
4. The expanded RAM of 768 bytes (00H to 2FFH) is indirectly addressable by the move external instruction (MOVX) and clearing the EXTRAM bit.

Since the upper 128 bytes occupy the same addresses as the SFRs, the RAM must be accessed indirectly. The RAM and SFRs space are physically separate even though they have the same addresses.
AUXR - Auxiliary register (address 8EH) bit allocation
Not bit addressable; Reset value 00H


Bit 7 6 5 4 3 2 1 0
Symbol - - - - - - EXTRAM AO
When instructions access addresses in the upper 128 bytes (above 7FH), the MCU determines whether to access the SFRs or RAM by the type of instruction given. If it is indirect, then RAM is accessed. If it is direct, then an SFR is accessed. See the examples below.

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